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| 1 On Resistance, 15 V/+12 V/5 V iCMOS SPST Switches ADG1401/ADG1402 FEATURES 1 on resistance 0.2 on resistance flatness Up to 430 mA continuous current Fully specified at +12 V, 15 V, 5 V No VL supply required 3 V logic-compatible inputs Rail-to-rail operation 8-lead MSOP and 8-lead, 3 mm x 2 mm LFCSP packages FUNCTIONAL BLOCK DIAGRAM ADG1401 S D IN SWITCHES SHOWN FOR A LOGIC 1 INPUT Figure 1. ADG1401 Functional Block Diagram APPLICATIONS Automatic test equipment Data acquisition systems Battery-powered systems Sample-and-hold systems Audio signal routing Video signal routing Communication systems Relay replacements ADG1402 S D IN SWITCHES SHOWN FOR A LOGIC 1 INPUT Figure 2. ADG1402 Functional Block Diagram GENERAL DESCRIPTION The ADG1401/ADG1402 contain a single-pole/single-throw (SPST) switch. Figure 1 shows that with a logic input of 1, the switch of the ADG1401 is closed and that of the ADG1402 is open. Each switch conducts equally well in both directions when on and has an input signal range that extends to the supplies. In the off condition, signal levels up to the supplies are blocked. The iCMOS(R) (industrial CMOS) modular manufacturing process combines high voltage, complementary metal-oxide semiconductor (CMOS) and bipolar technologies. It enables the development of a wide range of high performance analog ICs capable of 33 V operation in a footprint that no other generation of high voltage parts has achieved. Unlike analog ICs using conventional CMOS processes, iCMOS components can tolerate high supply voltages while providing increased performance, dramatically lower power consumption, and a reduced package size. The on resistance profile is very flat over the full analog input range ensuring excellent linearity and low distortion when switching audio signals. The iCMOS construction ensures ultralow power dissipation, making the part ideally suited for portable and battery-powered instruments. PRODUCT HIGHLIGHTS 1. 2. 3. 4. 5. 1.3 maximum on resistance at 25C. Minimum distortion. 3 V logic-compatible digital inputs: VINH = 2.0 V, VINL = 0.8 V. No VL logic power supply required. 8-lead MSOP and 8-lead, 3 mm x 2 mm LFCSP packages. Rev. 0 Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 (c)2009 Analog Devices, Inc. All rights reserved. 08486-002 08486-001 ADG1401/ADG1402 TABLE OF CONTENTS Features .............................................................................................. 1 Applications ....................................................................................... 1 Functional Block Diagram .............................................................. 1 General Description ......................................................................... 1 Product Highlights ........................................................................... 1 Revision History ............................................................................... 2 Specifications..................................................................................... 3 15 V Dual Supply ....................................................................... 3 +12 V Single Supply ..................................................................... 4 5 V Dual Supply ......................................................................... 5 Continuous Current Per Channel, S or D ..................................6 Absolute Maximum Ratings ............................................................7 Thermal Resistance .......................................................................7 ESD Caution...................................................................................7 Pin Configuration and Function Descriptions..............................8 Typical Performance Characteristics ..............................................9 Test Circuits ..................................................................................... 12 Terminology .................................................................................... 14 Outline Dimensions ....................................................................... 15 Ordering Guide .......................................................................... 15 REVISION HISTORY 10/09--Revision 0: Initial Version Rev. 0 | Page 2 of 16 ADG1401/ADG1402 SPECIFICATIONS 15 V DUAL SUPPLY VDD = +15 V 10%, VSS = -15 V 10%, GND = 0 V, unless otherwise noted. Table 1. Parameter ANALOG SWITCH Analog Signal Range On Resistance, RON On Resistance Flatness, RFLAT (ON) LEAKAGE CURRENTS Source Off Leakage, IS (Off ) Drain Off Leakage, ID (Off ) Channel On Leakage, ID, IS (On) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IINL or IINH Digital Input Capacitance, CIN DYNAMIC CHARACTERISTICS 1 tON tOFF Charge Injection Off Isolation Total Harmonic Distortion + Noise -3 dB Bandwidth Insertion Loss CS (Off ) CD (Off ) CD, CS (On) POWER REQUIREMENTS IDD IDD ISS VDD/VSS 1 25C -40C to +85C -40C to +125C VDD to VSS Unit V typ max typ max nA typ nA max nA typ nA max nA typ nA max V min V max A typ A max pF typ ns typ ns max ns typ ns max pC typ dB typ % typ MHz typ dB typ pF typ pF typ pF typ A typ A max A typ A max A typ A max V min/max Test Conditions/Comments 1 1.3 0.2 0.23 0.05 0.4 0.05 0.4 0.2 1 1.6 0.26 1.8 0.3 VS = 10 V, IS = -10 mA; see Figure 20 VDD = +13.5 V, VSS = -13.5 V VS = 10 V; IS = -10 mA VDD = +16.5 V, VSS = -16.5 V VS = 10 V, VD = 10 V; see Figure 21 VS = 10 V, VD = 10 V; see Figure 21 VS = VD = 10 V; see Figure 22 3 3 3 150 150 150 2.0 0.8 0.002 0.1 4 120 150 120 150 -12 -58 0.008 120 0.08 36 41 187 0.002 1.0 60 95 0.002 1.0 4.5/16.5 VIN = VGND or VDD 185 175 215 200 RL = 300 , CL = 35 pF VS = 10 V; see Figure 23 RL = 300 , CL = 35 pF VS = 10 V; see Figure 23 VS = 0 V, RS = 0 , CL = 1 nF; see Figure 24 RL = 50 , CL = 5 pF, f = 1 MHz; see Figure 25 RL = 10 k, 5 V rms, f = 20 Hz to 20 kHz; see Figure 27 RL = 50 , CL = 5 pF; see Figure 26 RL = 50 , CL = 5 pF, f = 1 MHz; see Figure 26 f = 1 MHz, VS = 0 V f = 1 MHz, VS = 0 V f = 1 MHz, VS = 0 V VDD = +16.5 V, VSS = -16.5 V Digital inputs = 0 V or VDD Digital inputs = 5 V Digital inputs = 0 V, 5 V, or VDD Ground = 0 V Guaranteed by design, not subject to production test. Rev. 0 | Page 3 of 16 ADG1401/ADG1402 +12 V SINGLE SUPPLY VDD = +12 V 10%, VSS = 0 V, GND = 0 V, unless otherwise noted. Table 2. Parameter ANALOG SWITCH Analog Signal Range On Resistance, RON On Resistance Flatness, RFLAT (ON) LEAKAGE CURRENTS Source Off Leakage, IS (Off ) Drain Off Leakage, ID (Off ) Channel On Leakage, ID, IS (On) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IINL or IINH Digital Input Capacitance, CIN DYNAMIC CHARACTERISTICS 1 tON tOFF Charge Injection Off Isolation -3 dB Bandwidth Insertion Loss CS (Off ) CD (Off ) CD, CS (On) POWER REQUIREMENTS IDD IDD VDD 1 25C -40C to +85C -40C to +125C 0 V to VDD Unit V typ max typ max nA typ nA max nA typ nA max nA typ nA max V min V max A typ A max pF typ ns typ ns max ns typ ns max pC typ dB typ MHz typ dB typ pF typ pF typ pF typ A typ A max A typ A max V min/max Test Conditions/Comments 2 2.4 0.6 0.68 0.05 0.4 0.05 0.4 0.2 1 2.9 0.8 3.2 0.85 VS = 0 V to 10 V, IS = -10 mA; see Figure 20 VDD = 10.8 V, VSS = 0 V VS = 0 V to 10 V, IS = -10 mA VDD = 13.2 V, VSS = 0 V VS = 1 V/10 V, VD = 10 V/1 V; see Figure 21 VS = 1 V/10 V, VD = 10 V/1 V; see Figure 21 VS = VD = 1 V or 10 V; see Figure 22 3 3 3 150 150 150 2.0 0.8 0.002 0.1 4 180 235 140 185 57 -58 82 0.15 61 68 181 0.001 1.0 60 95 5/16.5 VIN = VGND or VDD 295 215 335 260 RL = 300 , CL = 35 pF VS = 8 V; see Figure 23 RL = 300 , CL = 35 pF VS = 8 V; see Figure 23 VS = 6 V, RS = 0 , CL = 1 nF; see Figure 24 RL = 50 , CL = 5 pF, f = 1 MHz; see Figure 25 RL = 50 , CL = 5 pF; see Figure 26 RL = 50 , CL = 5 pF, f = 1 MHz; see Figure 26 f = 1 MHz, VS = 6 V f = 1 MHz, VS = 6 V f = 1 MHz, VS = 6 V VDD = 13.2 V Digital inputs = 0 V or VDD Digital inputs = 5 V Ground = 0 V, VSS = 0 V Guaranteed by design, not subject to production test. Rev. 0 | Page 4 of 16 ADG1401/ADG1402 5 V DUAL SUPPLY VDD = +5 V 10%, VSS = -5 V 10%, GND = 0 V, unless otherwise noted. Table 3. Parameter ANALOG SWITCH Analog Signal Range On Resistance, RON On Resistance Flatness, RFLAT (ON) LEAKAGE CURRENTS Source Off Leakage, IS (Off ) Drain Off Leakage, ID (Off ) Channel On Leakage, ID, IS (On) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IINL or IINH Digital Input Capacitance, CIN DYNAMIC CHARACTERISTICS 1 tON tOFF Charge Injection Off Isolation Total Harmonic Distortion + Noise -3 dB Bandwidth Insertion Loss CS (Off ) CD (Off ) CD, CS (On) POWER REQUIREMENTS IDD ISS VDD/VSS 1 25C -40C to +85C -40C to +125C 0 V to VDD Unit V typ max typ max nA typ Test Conditions/Comments 2.3 2.7 0.65 0.72 0.02 0.4 0.02 0.4 0.1 1 3.3 0.85 3.7 0.9 VS = 4.5 V, IS = -10 mA; see Figure 20 VDD = +4.5 V, VSS = -4.5 V VS = 4.5 V, IS = -10 mA VDD = +5.5 V, VSS = -5.5 V VS = 4.5 V, VD = 4.5 V; see Figure 21 VS = 4.5 V, VD = 4.5 V; see Figure 21 VS = VD = 4.5 V; see Figure 22 3 3 3 150 150 150 2.0 0.8 nA max nA typ nA max nA typ nA max V min V max A typ A max pF typ ns typ ns max ns typ ns max pC typ dB typ % typ MHz typ dB typ pF typ pF typ pF typ A typ A max A typ A max V min/max 0.002 0.1 4 290 375 235 305 145 -58 0.02 79 0.14 52 58 198 0.001 1.0 0.001 1.0 4.5/16.5 VIN = VGND or VDD 460 365 520 405 RL = 300 , CL = 35 pF VS = 3 V; see Figure 23 RL = 300 , CL = 35 pF VS = 3 V; see Figure 23 VS = 0 V, RS = 0 , CL = 1 nF; see Figure 24 RL = 50 , CL = 5 pF, f = 1 MHz; see Figure 25 RL = 10 k, 5 V p-p, f = 20 Hz to 20 kHz; see Figure 27 RL = 50 , CL = 5 pF; see Figure 26 RL = 50 , CL = 5 pF, f = 1 MHz; see Figure 26 VS = 0 V, f = 1 MHz VS = 0 V, f = 1 MHz VS = 0 V, f = 1 MHz VDD = +5.5 V, VSS = -5.5 V Digital inputs = 0 V or VDD Digital inputs = 0 V or VDD Ground = 0 V Guaranteed by design, not subject to production test. Rev. 0 | Page 5 of 16 ADG1401/ADG1402 CONTINUOUS CURRENT PER CHANNEL, S OR D Table 4. Parameter CONTINUOUS CURRENT, S or D 1 15 V Dual Supply 8-Lead MSOP (JA = 206C/W) 8-Lead LFCSP (JA = 50.8C/W) +12 V Single Supply 8-Lead MSOP (JA = 206C/W) 8-Lead LFCSP (JA = 50.8C/W) 5 V Dual Supply 8-Lead MSOP (JA = 206C/W) 8-Lead LFCSP (JA = 50.8C/W) 1 25C 85C 125C Unit Test Conditions/Comments VDD = +13.5 V, VSS = -13.5 V 275 430 255 355 250 340 190 275 180 235 175 225 125 160 120 145 120 140 mA maximum mA maximum VDD = 10.8 V, VSS = 0 V mA maximum mA maximum VDD = +4.5 V, VSS = -4.5 V mA maximum mA maximum Guaranteed by design, not subject to production test. Rev. 0 | Page 6 of 16 ADG1401/ADG1402 ABSOLUTE MAXIMUM RATINGS TA = 25C, unless otherwise noted. Table 5. Parameter VDD to VSS VDD to GND VSS to GND Analog Inputs1 Digital Inputs 1 THERMAL RESISTANCE Table 6. Thermal Resistance Package Type 8-Lead MSOP (4-Layer Board) 8-Lead LFCSP JA 206 50.8 JC 44 Unit C/W C/W Rating 35 V -0.3 V to +25 V +0.3 V to -25 V VSS - 0.3 V to VDD + 0.3 V or 30 mA, whichever occurs first GND - 0.3 V to VDD + 0.3 V or 30 mA, whichever occurs first ESD CAUTION Peak Current, S or D (Pulsed at 1 ms, 10% Duty-Cycle Maximum) 8-Lead MSOP (4-Layer Board) 8-Lead LFCSP Continuous Current per Channel, S or D Operating Temperature Range Industrial Storage Temperature Range Junction Temperature Reflow Soldering Peak Temperature, Pb Free 1 500 mA 700 mA Data in Table 4 + 15% -40C to +125C -65C to +150C 150C 260C Over voltages at IN, S, or D are clamped by internal diodes. Current should be limited to the maximum ratings given. Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Rev. 0 | Page 7 of 16 ADG1401/ADG1402 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS S1 NC 2 GND 3 VDD 4 ADG1401/ ADG1402 TOP VIEW (Not to Scale) 8D 7 VSS 6 IN 5 NC Figure 3. ADG1401/ADG1402 Pin Configuration Table 7. ADG1401/ADG1402 Pin Function Descriptions Pin No. 1 2 3 4 5 6 7 8 Mnemonic S NC GND VDD NC IN VSS D EPAD Description Source Terminal. This pin can be an input or output. No Connect. Ground (0 V) Reference. Most Positive Power Supply Potential. No Connect. Logic Control Input. Most Negative Power Supply Potential. Drain Terminal. This pin can be an input or output. Exposed pad tied to substrate, VSS, for LFCSP package. Table 8. ADG1401/ADG1402 Truth Table ADG1401 IN 1 0 ADG1402 IN 0 1 Switch Condition On Off Rev. 0 | Page 8 of 16 08486-003 NOTES 1. EXPOSED PAD TIED TO SUBSTRATE, VSS. 2. NC = NO CONNECT. ADG1401/ADG1402 TYPICAL PERFORMANCE CHARACTERISTICS 1.6 TA = 25C 1.5 1.4 ON RESISTANCE () 1.3 1.2 1.1 1.0 0.9 0.8 0.7 0.6 -16.5 VDD = +16.5V VSS = -16.5V 08486-016 VDD = +10V VSS = -10V VDD = +12V VSS = -12V 2.0 1.8 1.6 ON RESISTANCE () VDD = +13.5V VSS = -13.5V VDD = +15V VSS = -15V 1.4 TA = +125C 1.2 1.0 TA = +85C TA = +25C 0.8 0.6 0.4 0.2 TA = -40C -11.5 -6.5 -1.5 VS, VD (V) 3.5 8.5 13.5 -5 0 VS, VD (V) 5 10 15 Figure 4. On Resistance as a Function of VD (VS) for Dual Supply 4.0 VDD = 5V VSS = 0V 3.5 VDD = 10.8V VSS = 0V VDD = 8V VSS = 0V VDD = 12V VSS = 0V VDD = 13.2V VSS = 0V VDD = 15V VSS = 0V Figure 7. On Resistance as a Function of VD (VS) for Different Temperatures, 15 V Dual Supply 3.0 2.5 TA = +125C 2.0 TA = +85C 1.5 TA = +25C TA = -40C ON RESISTANCE () 3.0 2.5 2.0 ON RESISTANCE () 1.0 1.5 0.5 VDD = 12V VSS = 0V 08486-014 0 2 4 6 8 VS, VD (V) 10 12 14 16 0 2 4 6 8 10 12 VS, VD (V) Figure 5. On Resistance as a Function of VD (VS) for Single Supply 2.4 TA = 25C 2.0 VDD = +4.5V VSS = -4.5V VDD = +5V VSS = -5V Figure 8. On Resistance as a Function of VD (VS) for Different Temperatures, +12 V Single Supply 3.5 3.0 VDD = +5V VSS = -5V ON RESISTANCE () ON RESISTANCE () 1.8 2.5 2.0 VDD = +5.5V VSS = -5.5V TA = +125C TA = +85C TA = +25C 1.6 1.5 TA = -40C 1.0 1.4 1.2 VDD = +7V VSS = -7V 0.5 0 -5 -4 -3 -2 -1 0 VS, VD (V) 1 2 3 4 5 08486-015 1.0 -7 -5 -3 -1 1 3 5 7 VS, VD (V) Figure 6. On Resistance as a Function of VD (VS) for Dual Supply Figure 9. On Resistance as a Function of VD (VS) for Different Temperatures, 5 V Dual Supply Rev. 0 | Page 9 of 16 08486-013 08486-011 1.0 0 08486-012 VDD = +15V VSS = -15V 0 -15 -10 ADG1401/ADG1402 80 VDD = +15V VSS = -15V 70 VBIAS = 10V 90 80 70 60 50 IS (OFF) - + ID (OFF) + - IS (OFF) - + ID (OFF) + - ID, IS (ON) + + ID, IS (ON) - - IDD (A) IDD PER CHANNEL TA = 25C LEAKAGE CURRENT (nA) 60 50 40 30 20 10 0 08486-028 40 30 20 10 0 VDD = 12V VSS = 0V VDD = +15V VSS = -15V VDD = +5V VSS = -5V 0 20 40 60 80 100 120 0 2 4 6 8 10 12 14 TEMPERATURE (C) LOGIC LEVEL, IN (V) Figure 10. Leakage Currents as a Function of Temperature, 15 V Dual Supply 70 VDD = 12V VSS = 0V 60 VBIAS = 1V/10V Figure 13. IDD vs. Logic Level 1000 TA = 25C 800 600 VDD = +5V VSS = -5V LEAKAGE CURRENT (nA) CHARGE INJECTION (pC) 50 40 30 20 10 0 -10 0 20 40 60 80 100 120 TEMPERATURE (C) IS (OFF) + - ID (OFF) - + IS (OFF) - + ID (OFF) + - ID, IS (ON) + + ID, IS (ON) - - 400 200 0 -200 -400 -600 -800 VDD = +12V VSS = 0V VDD = +15V VSS = -15V 08486-029 -10 -5 0 VS (V) 5 10 15 Figure 11. Leakage Currents as a Function of Temperature, +12 V Single Supply 60 VDD = +5V VSS = -5V 50 VBIAS = 4.5V Figure 14. Charge Injection vs. Source Voltage 350 300 250 LEAKAGE CURRENT (nA) 40 30 tOFF (5V) IS (OFF) + - ID (OFF) - + IS (OFF) - + ID (OFF) + - ID, IS (ON) + + ID, IS (ON) - - TIME (ns) 200 150 100 50 20 10 0 tON (5V) 08486-027 -10 0 20 40 60 80 100 120 TEMPERATURE (C) -20 0 20 40 60 80 100 120 TEMPERATURE (C) Figure 12. Leakage Currents as a Function of Temperature, 5 V Dual Supply Figure 15. tON/tOFF Times vs. Temperature Rev. 0 | Page 10 of 16 08486-009 0 -40 tON (12V) tOFF (12V) tOFF (15V) tON (15V) 08486-030 -1000 -15 08486-018 -10 -10 ADG1401/ADG1402 0 TA = 25C VDD = +15V VSS = -15V 0.030 RL = 110 TA = 25C -20 OFF ISOLATION (dB) 0.025 VDD = 5V, VSS = 5V, VS = 5V p-p -40 0.020 THD + N (%) -60 0.015 -80 0.010 VDD = 15V, VSS = 15V, VS = 10V p-p -100 0.005 08486-005 10k 100k 1M 10M 100M 1G 0 5k 10k FREQUENCY (Hz) 15k 20k FREQUENCY (Hz) Figure 16. Off Isolation vs. Frequency 0 Figure 18. THD + N vs. Frequency 0 -0.5 -1.0 INSERTION LOSS (dB) TA = 25C VDD = +15V VSS = -15V TA = 25C -10 VDD = +15V VSS = -15V -20 -30 NO DECOUPLING CAPACITORS ACPSRR (dB) -1.5 -2.0 -2.5 -40 -50 -60 -70 DECOUPLING CAPACITORS -3.0 -3.5 -4.0 10k -80 -90 10k 100k FREQUENCY (Hz) 1M 10M 08486-006 100k 1M 10M 100M 1G FREQUENCY (Hz) Figure 17. On Response vs. Frequency 08486-004 -100 1k Figure 19. ACPSRR vs. Frequency Rev. 0 | Page 11 of 16 08486-008 -120 1k 0 ADG1401/ADG1402 TEST CIRCUITS V ID (ON) NC S D A VD 08486-021 S D IDS 08486-019 VS NC = NO CONNECT Figure 20. On Resistance IS (OFF) A VS S D ID (OFF) A VD 08486-020 Figure 22. On Leakage Figure 21. Off Leakage VDD 0.1F VSS 0.1F VIN VOUT VIN RL 300 GND CL 35pF VOUT ADG1401 50% 50% VDD S VS VSS D ADG1402 50% 90% 50% 90% 08486-022 08486-023 IN tON tOFF Figure 23. Switching Times, tON and tOFF VDD VSS VDD RS VS S VSS D VOUT CL 1nF GND VIN ADG1401 ON OFF IN VIN VOUT ADG1402 QINJ = CL x VOUT VOUT Figure 24. Charge Injection Rev. 0 | Page 12 of 16 ADG1401/ADG1402 VDD 0.1F VSS 0.1F NETWORK ANALYZER VDD 0.1F VSS 0.1F AUDIO PRECISION VDD S VSS RS VDD S IN VSS 50 D 50 VS VOUT IN D VS V p-p RL 10k VOUT 08486-026 VIN GND RL 50 VIN GND OFF ISOLATION = 20 LOG VS Figure 25. Off Isolation VDD 0.1F VSS 0.1F NETWORK ANALYZER 08486-024 VOUT Figure 27. THD + N VDD S IN VSS 50 VS D VOUT VIN GND RL 50 INSERTION LOSS = 20 LOG VOUT WITH SWITCH VOUT WITHOUT SWITCH Figure 26. Bandwidth Rev. 0 | Page 13 of 16 08486-025 ADG1401/ADG1402 TERMINOLOGY IDD The positive supply current. ISS The negative supply current. VD (VS) The analog voltage on Terminal D and Terminal S. RON The ohmic resistance between Terminal D and Terminal S. RFLAT (ON) Flatness is defined as the difference between the maximum and minimum value of on resistance as measured over the specified analog signal range. IS (Off) The source leakage current with the switch off. ID (Off) The drain leakage current with the switch off. ID, IS (On) The channel leakage current with the switch on. VINL The maximum input voltage for Logic 0. VINH The minimum input voltage for Logic 1. IINL (IINH) The input current of the digital input. CS (Off) The off switch source capacitance, measured with reference to ground. CD (Off) The off switch drain capacitance, measured with reference to ground. CD, CS (On) The on switch capacitance, measured with reference to ground. CIN The digital input capacitance. tON Delay time between the 50% and 90% points of the digital input and switch on condition. See Figure 23. tOFF Delay time between the 50% and 90% points of the digital input and switch off condition. See Figure 23. Charge Injection A measure of the glitch impulse transferred from the digital input to the analog output during switching. See Figure 24. Off Isolation A measure of unwanted signal coupling through an off switch. See Figure 25. Bandwidth The frequency at which the output is attenuated by 3 dB. See Figure 26. On Response The frequency response of the on switch. Insertion Loss The loss due to the on resistance of the switch. See Figure 26. THD + N The ratio of the harmonic amplitude plus noise of the signal to the fundamental. See Figure 27. AC Power Supply Rejection Ratio (ACPSRR) ACPSRR measures the ability of a part to avoid coupling noise and spurious signals that appear on the supply voltage pin to the output of the switch. The dc voltage on the device is modulated by a sine wave of 0.62 V p-p. The ratio of the amplitude of the signal on the output to the amplitude of the modulation is the ACPSRR. See Figure 19. Rev. 0 | Page 14 of 16 ADG1401/ADG1402 OUTLINE DIMENSIONS 3.20 3.00 2.80 8 5 3.20 3.00 2.80 PIN 1 IDENTIFIER 1 5.15 4.90 4.65 4 0.65 BSC 0.95 0.85 0.75 0.15 0.05 COPLANARITY 0.10 0.40 0.25 15 MAX 1.10 MAX 0.80 0.55 0.40 100709-B 6 0 0.23 0.09 COMPLIANT TO JEDEC STANDARDS MO-187-AA Figure 28. 8-Lead Mini Small Outline Package [MSOP] (RM-8) Dimensions shown in millimeters 2.00 BSC 1.75 1.65 1.50 5 8 3.00 BSC EXPOSED PAD 1.90 1.80 1.65 1 0.20 MIN 4 INDEX AREA TOP VIEW 0.80 0.75 0.70 SEATING PLANE 0.50 0.40 0.30 0.15 REF PIN 1 INDICATOR BOTTOM VIEW SIDE VIEW Figure 29. 8-Lead Lead Frame Chip Scale Package [LFCSP_WD] 3 mm x 2 mm Body, Very Very Thin, Dual Lead (CP-8-4) Dimensions shown in millimeters ORDERING GUIDE Model ADG1401BRMZ1 ADG1401BRMZ-REEL71 ADG1401BCPZ-REEL71 ADG1402BRMZ1 ADG1402BRMZ-REEL71 ADG1402BCPZ-REEL71 1 Temperature Range -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C -40C to +125C Package Description 8-Lead Mini Small Outline Package [MSOP] 8-Lead Mini Small Outline Package [MSOP] 8-Lead Lead Frame Chip Scale Package [LFCSP_WD] 8-Lead Mini Small Outline Package [MSOP] 8-Lead Mini Small Outline Package [MSOP] 8-Lead Lead Frame Chip Scale Package [LFCSP_WD] Package Option RM-8 RM-8 CP-8-4 RM-8 RM-8 CP-8-4 081806-A 0.50 0.30 0.25 0.20 COPLANARITY 0.08 0.05 MAX 0.02 NOM FOR PROPER CONNECTION OF THE EXPOSED PAD, REFER TO THE PIN CONFIGURATION AND FUNCTION DESCRIPTIONS SECTION OF THIS DATA SHEET. Branding S2T S2T 2Y S2U S2U 1F Z = RoHS Compliant Part. Rev. 0 | Page 15 of 16 ADG1401/ADG1402 NOTES (c)2009 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D08486-0-10/09(0) Rev. 0 | Page 16 of 16 |
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